Search - VHDL I2C

[Other] IPCores_iic_8051

Description: I2C_IP_Core, 使用VHDL 和VERLOG编写，并有文档说明-I2C IP Core, VHDL/Verilog
Platform: | Size: 1453056 | Author: zhangyang | Hits:

Description: fpga例程：用fpga实现i2c串口通讯的vhdl详细代码，完整的quartus工程，可直接用-fpga routines: i2c serial communication with fpga implementation details of vhdl code, complete quartus project, can be directly used
Platform: | Size: 861184 | Author: 刘畅 | Hits:

[VHDL-FPGA-Verilog] i2c_master_slave_core_latest.tar

Description: i2c 控制器 verilog /vhdl 源码，敬请使用-i2c control VERILOG /VHDL SOURCE
Platform: | Size: 4562944 | Author: 陈成 | Hits:

[VHDL-FPGA-Verilog] i2c_7113

Description: 利用I2C配置SAF7113的代码，利用vhdl语言编写。-Config the SAF7113 via I2C,write in VHDL.
Platform: | Size: 3072 | Author: likai | Hits:

[source in ebook] I2C_SLAVE

Description: I2C总线从机的VHDL代码实现,希望对相关设计人员提供参考-The I2C bus from the VHDL code to achieve，hoping to provide reference for the related design personnel
Platform: | Size: 1024 | Author: ls112853 | Hits:

[VHDL-FPGA-Verilog] iicbus

Description: 基于Nios II的I2C总线设计,开发环境QuartusII，VHDL，经典示例。-I2C Bus Design Based on Nios II
Platform: | Size: 13433856 | Author: Ben Shen | Hits:

[VHDL-FPGA-Verilog] AT24CXX

Description: 使用标准VHDL编写的I2C协议，用于AT24XX系列的EEPROM读写。-use VHDL language to implement IIC protocol, which is able to read or write eeprom.
Platform: | Size: 493568 | Author: 林铎 | Hits:

[Other] TEMPERATURE_MONITOR

Description: I2C type Temperature monitor sensor access logic by VHDL.
Platform: | Size: 1024 | Author: WS Chang | Hits:

[VHDL-FPGA-Verilog] trial_i2c

Description: i2c code for vhdl implementation,i2c main code with u-art_tx.vhd file and i2c_master.vhd
Platform: | Size: 123904 | Author: nikhil | Hits:

[Other] i2c_master

Description: This details an I2C master component for single master buses, written in VHDL for use in CPLDs and FPGAs. The component reads and writes to user logic over a parallel interface. It was designed using Quartus II, version 11.1. -This details an I2C master component for single master buses, written in VHDL for use in CPLDs and FPGAs. The component reads and writes to user logic over a parallel interface. It was designed using Quartus II, version 11.1.
Platform: | Size: 3072 | Author: jakom | Hits:

[VHDL-FPGA-Verilog] i2c_master_top

Description: I2C控制总线的顶层描述verilog代码，选项中没有verilog语言，故选择VHDL-The function description of I2C bus top level
Platform: | Size: 2048 | Author: Luke | Hits:

[VHDL-FPGA-Verilog] i2c_adv7180

Description: ADV7180的i2c驱动程序，VHDL语言开发，有详细注释，适合初学者学习和参考。-ADV7180 i2c driver, VHDL language development, have detailed comments, suitable for beginners learning and reference.
Platform: | Size: 880640 | Author: 谢小辉 | Hits:

[VHDL-FPGA-Verilog] i2cBUS

Description: Altera的I2C总线FPGA程序，内有详细使用说明- The I2C Controller is available in VHDL and is optimized for the Altera® APEX™ , Stratix® , and Cyclone™ device families. All of the register addresses are defined as constants in the VHDL source files and can be easily customized for customer use. The MBASE address is defined as a generic and can also be easily changed and customized for customer use. In addition, this design outputs the MCF signal on a pin which can be used by the uC as a quick indication that the I2C transfer is complete. This design uses the I2C SCL signal as a clock. This requires that the SCL signal have clean, fast edges on both the rising and falling edges of this signal. Slow rise and fall times on this signal can show noise effects which can cause improper clocking of registers within the Stratix FPGA. If the loading of the SCL signal in the system is such that the rise and fall times are slow (>20nS), external buffers such as Schmitt Triggers will be required to interface to the
Platform: | Size: 2252800 | Author: 我是谁 | Hits:

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[Other] IPCores_iic_8051

[VHDL-FPGA-Verilog] I2C_i2c

[VHDL-FPGA-Verilog] i2c_master_slave_core_latest.tar

[VHDL-FPGA-Verilog] i2c_7113

[source in ebook] I2C_SLAVE

[VHDL-FPGA-Verilog] iicbus

[VHDL-FPGA-Verilog] AT24CXX

[Other] TEMPERATURE_MONITOR

[VHDL-FPGA-Verilog] trial_i2c

[Other] i2c_master

[VHDL-FPGA-Verilog] i2c_master_top

[VHDL-FPGA-Verilog] i2c_adv7180

[VHDL-FPGA-Verilog] i2cBUS

[VHDL-FPGA-Verilog] iic-BUS

[VHDL-FPGA-Verilog] I2C_EPM3128

[VHDL-FPGA-Verilog] IP

[Windows Develop] 6990718

[Com Port] prwgrfsscollterminal

CodeBus www.codebus.net